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Estimated reading time: 1 minute
Beyond Design: Learning the Curve
Currently, power integrity is just entering the mainstream market phase of the technology adoption life cycle. The early market is dominated by innovators and visionaries who will pay top dollar for new technology, allowing complex and expensive competitive tools to thrive. However, the mainstream market waits for the technology to be proven before jumping in. Power distribution network (PDN) planning was previously overlooked during the design process, but it is now becoming an essential part of PCB design. But what about the learning curve? The mainstream market demands out-of-the-box, ready-to-use tools.
The mainstream market, representing more than 65% of the total EDA software market, wants established technology at an affordable price. The majority of high-end tools require a PhD to drive. However, the mainstream market demands tools that are intuitive and can be used by any member of the development team from EEs to PCB designers to achieve quick results.
Inadequate power delivery can exhibit intermittent signal integrity issues. These include high crosstalk and excessive emission of electromagnetic radiation, degrading performance and reliability of the product. The PDN must accommodate variances of current transients with as little change in power supply voltages as possible. So the goal of PDN planning is to design a stable power source for all the required power supplies. As with stackup planning, the PDN design is required before a single IC is placed on the board.
Also, the same PDN connections (planes) that are used to transport high-transient currents are used to carry the return currents for critical signal transmission lines. If high-frequency switching noise exists on the planes, coupling may occur, resulting in ground bounce, bit failure or timing errors. Many failures to pass electromagnetic compliancy (EMC) are due to excessive noise on the PDN coupling into external cables and radiating emissions.
If you are not familiar with a PDN plot (AC impedance vs. frequency), it can be awfully daunting at first.
To read the rest of this column, which appeared in the April 2015 issue of The PCB Design Magazine, click here.
More Columns from Beyond Design
Beyond Design: Dielectric Material Selection GuideBeyond Design: The Art of Presenting PCB Design Courses
Beyond Design: Embedded Capacitance Material
Beyond Design: Return Path Optimization
Beyond Design: Just a Matter of Time
Beyond Design: Design Success with IPC Standards
Beyond Design: Integrating AI Into PCB Design Flow
Beyond Design: Standing Waves in Multilayer PCB Plane Cavities